A number of tools depend on passing the kernel image, the initial ramdisk,
and the kernel command line to the guest on the QEMU command line (options
-kernel, -initrd, -append, respectively). At the moment, these QEMU
options work, but the guest kernel loaded this way is launched by a
minimal binary firmware that is dynamically composed by QEMU. As a
consequence, such a kernel has no UEFI environment.
This patch enables -kernel, -initrd, -append to work on top of the
ArmVirtualizationQemu firmware build. The approach it takes is different
from how the same functionality is implemented in OvmfPkg.
OvmfPkg contains a full-fledged Linux boot loader (see
"OvmfPkg/Library/PlatformBdsLib/QemuKernel.c" and
"OvmfPkg/Library/LoadLinuxLib/"). OVMF's LoadLinuxLib sets up the required
kernel environment in a sophisticated way (including x86-specific
artifacts like the GDT), calls ExitBootServices() itself (for legacy
kernels without EFI handover protocol), and jumps to the kernel (using x86
assembly).
In ArmVirtualizationPkg's PlatformIntelBdsLib, we require the kernel being
loaded to have an EFI stub -- that is, to be a genuine UEFI application.
(The EFI stub is not an additional burden for guest kernels -- the EFI
stub is a hard requirement anyway because it needs to process the DTB
heavily:
- it removes memory nodes,
- it removes memreserve entries,
- it adds UEFI properties to the "chosen" node,
- it calculates and installs virt-to-phys mappings with
SetVirtualAddressMap() in a way that enables kexec [planned].
Kudos to Ard Biesheuvel for summarizing the above.)
An EFI-stubbed Linux guest kernel can be loaded with plain
gBS->LoadImage(). The EFI stub will look up its own
EFI_LOADED_IMAGE_DEVICE_PATH_PROTOCOL instance (ie. the device path where
it has been loaded from), and it will locate the initial ramdisk named by
the "initrd" command line parameter as a *sibling file* on the same
device.
The initrd file is then loaded using the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL.
This approach enables the EFI stub to load the initial ramdisk from normal
EFI System Partitions, from remote PXE/TFTP directories -- and it enables
us to provide the initrd from memory as well.
In this patch:
- We download the kernel image, the initrd image, and the kernel command
line, using QEMU's fw_cfg interface.
- We create a read-only EFI_SIMPLE_FILE_SYSTEM_PROTOCOL instance that has
just a root directory, with the three downloaded files in it.
- The handle that carries the simple file system has a single-node
VenHw(...) device path (not counting the terminator node).
- We load the EFI-stubbed kernel (which is a UEFI application) with
gBS->LoadImage(), passing "VenHw(...)/kernel" as device path. This
causes gBS->LoadImage() to call back into our filesystem.
- Appended to the downloaded command line, we pass "initrd=initrd" to the
EFI stub.
- Once the EFI stub is running, it loads the initial ramdisk from the
"sibling" device path "VenHw(...)/initrd", also calling back into our
filesystem.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16578 6f19259b-4bc3-4df7-8a09-765794883524
The default value of this PCD (in "IntelFrameworkModulePkg.dec")
identifies the "old shell" from EdkShellBinPkg. Our build includes the
"new" shell from ShellBinPkg/UefiShell/UefiShell.inf; let's specify the
FILE_GUID of that.
Otherwise, no boot option will be generated for the Shell application.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16577 6f19259b-4bc3-4df7-8a09-765794883524
We have all the required pieces in place. Let's call
SetBootOrderFromQemu() in PlatformBdsPolicyBehavior().
We disable OFW-to-UEFI device path fragment translation for virtio-pci,
and enable it only virtio-mmio at this time.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16576 6f19259b-4bc3-4df7-8a09-765794883524
Installing VenHw() device paths with this GUID, for the virtio-mmio
transports that we detect, enables other modules to recognize those
VenHw() nodes. (Note that the actual value doesn't change.)
In addition, to avoid reusing GUIDs in unrelated contexts, detach the
driver's FILE_GUID from its previous value.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16573 6f19259b-4bc3-4df7-8a09-765794883524
In PlatformBdsPolicyBehavior() we should follow the same pattern as in
OvmfPkg's: after the consoles are connected,
- connect all drivers and devices,
- enumerate all boot options,
- enter the Intel BDS FrontPage if the user presses a key different from
Enter.
We set the countdown to 3 seconds, similarly to the timeout that we
specify for ARM BDS.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16569 6f19259b-4bc3-4df7-8a09-765794883524
In the next patch(es) we'll customize the PlatformBdsLib instance used by
ArmVirtualizationQemu.dsc. Let's clone it first verbatim from
ArmPlatformPkg/Library/PlatformIntelBdsLib, changing only its FILE_GUID.
(Also, coding style errors like "missing space before open parenthesis"
and "missing space after comma or semicolon" have been cleaned up.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16568 6f19259b-4bc3-4df7-8a09-765794883524
After reviewing OvmfPkg's use of its own QemuFwCfgLib instances, it is
clear that its only pre-DXE fw_cfg dependency concerns S3 support (the
QemuFwCfgS3Enabled() call in "PlatformPei/Platform.c").
For ARM guests, S3 is in the distant future, but we can see several
shorter term applications for fw_cfg that all reside in DXE:
- controlling boot order (to be implemented in PlatformBdsLib for Intel
BDS),
- supporting -kernel / -initrd / -append boot on QEMU (to be implemented
in PlatformBdsLib for Intel BDS, similarly),
- loading and linking ACPI tables,
- installing SMBIOS tables.
Therefore it makes sense to add a simple MMIO-based fw_cfg client library
to ArmVirtualizationPkg that for the moment is only available to
DXE_DRIVER modules.
Because MMIO accesses are costly on KVM/ARM, InternalQemuFwCfgReadBytes()
accesses the fw_cfg data register in full words. This speeds up transfers
almost linearly.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16567 6f19259b-4bc3-4df7-8a09-765794883524
Qemu's firmware configuration interface for ARM consists of two MMIO
registers, a 16-bit selector, and a 64-bit data register that allows the
guest to transfer data with 8, 16, 32, and 64-bit wide accesses. Parse the
base address from the DTB, and expose the registers to the rest of DXE via
dynamic PCDs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16566 6f19259b-4bc3-4df7-8a09-765794883524
The original patch was assuming PathLib moved to MdeModulePkg.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16522 6f19259b-4bc3-4df7-8a09-765794883524
Rework the downloading of an image from a TFTP server to do not
depend on any "PXE specific" setting of the DHCP server.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <Ronald.Cron@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16516 6f19259b-4bc3-4df7-8a09-765794883524
Device Paths were not freed after calling
BDS_LOAD_OPTION_SUPPORT.CreateDevicePathNode()
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16514 6f19259b-4bc3-4df7-8a09-765794883524
Rework the setting of information about a file, in particular
file resizing, file renaming and the returned error codes in case
of error. This rework has implied a rework of the read, write, close
and flush functions.
To strickly separate what has been actually written to the media (flushed)
from what has not been written when a file is open, an "Info" field has
been added to the description of a file.
The field is used to store the modifications done to the file by the
means of SetInfo() like the change of the name or of the size. Such
changes are written to the media only when a flush occurs.
When a file is open, the information pointed to by the "Info" field is
always up-to-date. This is not the case of the information stored in
the "HwDescription" of the file description which from now is just a
mirror of what is written on the media.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <Ronald.Cron@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16511 6f19259b-4bc3-4df7-8a09-765794883524
Some AArch64 platforms have RAM and flash devices >4GB.
Update some additional Pcd entries to 64-bit, and change
the corresponding PcdGet32 calls to PcdGet64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16325 6f19259b-4bc3-4df7-8a09-765794883524
Update to show what the patch looks like in email form.
NOTE: This does not modify the wording of the "TianoCore Contribution
Agreement 1.0" section
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16297 6f19259b-4bc3-4df7-8a09-765794883524
All the required pending BaseTools patches have been merged.
This patch is not required anymore.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16275 6f19259b-4bc3-4df7-8a09-765794883524
ArmInvalidateInstructionAndDataTlb() was doing the same thing as
ArmInvalidateTlb().
Both invalidate Data and Instruction TLBs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16253 6f19259b-4bc3-4df7-8a09-765794883524
Rework the PL011UartGetControl() function removing a TODO by the way.
Update of the header comment blocks of (PL011Uart|SerialPort)GetControl() functions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16252 6f19259b-4bc3-4df7-8a09-765794883524
Rework of PL011UartSetControl() as a consequence as well as update of
function header comment blocks.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16251 6f19259b-4bc3-4df7-8a09-765794883524
Use the command to load and start a ARM Executable File from mass storage.
This is basically just an ELF file. The program is copied to memory and
the Entrypoint is called. Control is not expected to return back to the
Shell. This has only been tested on AArch64 with a limited set of AXF
binaries.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16247 6f19259b-4bc3-4df7-8a09-765794883524
ArmFvpDxe.inf was using the same file guid as ArmHwDxe.inf.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reported-By: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16246 6f19259b-4bc3-4df7-8a09-765794883524
The library already supports UEFI_DRIVER, we just need to relax the
restriction list.
This allows ArmVirtualizationPkg platforms to build applications, like the
UEFI shell.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16219 6f19259b-4bc3-4df7-8a09-765794883524
If FIRMWARE_VER is defined on the build command line, set
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString based on it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16212 6f19259b-4bc3-4df7-8a09-765794883524
Only ArmVirtualizationPkg based platforms are expected to use
the dynamic method to choose between SMC and HVC to invoke PSCI.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16204 6f19259b-4bc3-4df7-8a09-765794883524
If a storage device is used for Variable storage or access is provided
by the Simple Filesystem Protocol do not list it again for RAW memory
map access in the 'Add Boot device' menu.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16203 6f19259b-4bc3-4df7-8a09-765794883524
Some platforms do not have SysConfig controller used by the ARM
Versatile Express.
Some peripheral drivers currently rely on SysConfigLib (eg: PL031
RTC driver, LCD driver).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16143 6f19259b-4bc3-4df7-8a09-765794883524
This adds support for executing UEFI in a QEMU/mach-virt emulated environment.
The following assumptions are made about the target:
- DRAM base at 0x4000_0000, containing the device tree blob
- DRAM size at least 1 MB
- device tree uses 64-bit physical base addresses and sizes
- ARM architected timer
- Cortex-A15 CPU (if built for 32-bit)
The following information is retrieved from the device tree:
- PL011 UART base address
- GIC base addresses
- virtual timer interrupt
- PL031 RTC base address
- DRAM size, must be at least 128 MB
- virtio MMIO transports
- PSCI 0.2 availability (for reset and poweroff)
The device tree image is relocated and installed as a configuration table
so an EFI stub enabled kernel can be booted directly without the need for
a bootloader.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Casadevall <michael.casadevall@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16141 6f19259b-4bc3-4df7-8a09-765794883524
This adds 2 implementations of SerialPortLib for device tree based platforms
using a PL011 UART:
- an 'early' one which is completely stateless and uses only fixed PCDs
- a normal one which takes its base address from a HOB containing the base
address discovered in the PEI phase
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-with-remarks-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16140 6f19259b-4bc3-4df7-8a09-765794883524
This GUID will identify a customized HOB that carries the base address of
the PL011 serial port, for clients that cannot access PCDs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16139 6f19259b-4bc3-4df7-8a09-765794883524
This is an implementation of ArmPlatformLib that discovers the size of system
DRAM from a device tree blob located at the address passed in
gArmTokenSpaceGuid.PcdDeviceTreeBaseAddress, which should equal the value in
gArmTokenSpaceGuid.PcdSystemMemoryBase.
As the device tree blob is passed in system DRAM, this library can only be used
if sufficient DRAM is available (>= 128 MB) and if not using shadowed NOR. The
reason for this is that it makes it easier to guarantee that such a device tree
blob at base of DRAM will not be clobbered before we get a chance to preserve it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Casadevall <michael.casadevall@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16138 6f19259b-4bc3-4df7-8a09-765794883524
This driver enumerates the device nodes in the device tree located at the
base address passed in gArmTokenSpaceGuid.PcdDeviceTreeBaseAddress, and
installs drivers for devices it cares about (GIC interrupt controller, RTC,
architected timer interrupt)
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16137 6f19259b-4bc3-4df7-8a09-765794883524
This is a fork of the ARM PlatformPeiLib for virtual machines. The main
purpose of having this specific implementation is that it allows us to
preserve the device tree blob if it was passed to us in system DRAM.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16136 6f19259b-4bc3-4df7-8a09-765794883524
Introduce gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeBaseAddress and
PcdDeviceTreeInitialBaseAddress, which will be used by virtual machine ports
that discover the system configuration from a flattened device tree DTB image.
The latter is FixedPcd only, and should contain the initial offset of the DTB,
the former may be declared as dynamic, and updated at runtime if the DTB is
relocated before the DXE phase.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16135 6f19259b-4bc3-4df7-8a09-765794883524
To allow a dynamically discovered UART base address, we parse the device
tree early and store the base address in a HOB. To prevent circular
constructor dependencies from interfering with bringing up the serial port
using this dynamic base address, use our own private HobLib with no
dependencies on DebugLib either directly or indirectly through UefiLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16134 6f19259b-4bc3-4df7-8a09-765794883524
This adds an implementation of NorFlashPlatformLib that exposes the
two 64 MB NOR flash banks that are provided by QEMU's mach-virt
emulation both in 32-bit and 64-bit mode.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16133 6f19259b-4bc3-4df7-8a09-765794883524
This include file contains platform specific defines, and is shared by
various modules.
Contributed-under: TianoCore Contribution Agreement 1.0
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16132 6f19259b-4bc3-4df7-8a09-765794883524
This separates PlatformPei and PlatformPeiLib so the latter can be
overridden by a specific platform.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16110 6f19259b-4bc3-4df7-8a09-765794883524
When writing to the flash, make sure to use MmioWrite () wrappers instead
of letting the compiler generate the store instructions. This is needed
because under virtualization, store instructions with multiple outputs
(i.e., store pair or store with writeback) cannot be emulated efficiently
when operating on MMIO ranges.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16107 6f19259b-4bc3-4df7-8a09-765794883524
This library accesses SystemTable->RuntimeServices at runtime,
which means it should take care to use its updated value after
SetVirtualAddressMap () is called.
Replace references to gRT with mRT, which we initialize to gRT
and update to its virtual value on a virtual address change event.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16091 6f19259b-4bc3-4df7-8a09-765794883524
This changes the definition and a bunch of references to
gArmTokenSpaceGuid.PcdSystemMemoryBase and
gArmTokenSpaceGuid.PcdSystemMemorySize so they can be declared as dynamic PCDs
by the platform. Also, move the non-SEC call to
ArmPlatformInitializeSystemMemory() earlier, so a platform has a chance to set
these PCDs before they are first referenced.
The purpose is allowing dynamically instantiated virtual machines to declare
the system memory by passing a device tree.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16079 6f19259b-4bc3-4df7-8a09-765794883524
Move TimerDxe and ArmArchTimerLib to ArmGenericTimerCounterLib, and update all
platforms to select the physical counter instance they have been using
implicitly all along.
Contributed-under: TianoCore Contribution Agreement 1.0
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16078 6f19259b-4bc3-4df7-8a09-765794883524
- We need to delete the boot option variable from storage not just
adjust the BootOrder variable.
- The Linux tool 'efibootmgr' still showed the previously removed boot
options.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16070 6f19259b-4bc3-4df7-8a09-765794883524
This PCD has been replaced by ArmPlatformIsPrimaryCore() function.
Althrough this PCD is still used in some occasions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16026 6f19259b-4bc3-4df7-8a09-765794883524
Allow the PCDs gArmPlatformTokenSpaceGuid.PcdPL031RtcBase and
gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy PCDs to be
declared as PcdsDynamic by the platform so they can be overridden
during boot.
Contributed-under: TianoCore Contribution Agreement 1.0
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16015 6f19259b-4bc3-4df7-8a09-765794883524
Remove the PCDs gArmTokenSpaceGuid.PcdGicDistributorBase and
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase from PrePeiCoreUniCore.inf,
as they are not in fact used by the module.
Contributed-under: TianoCore Contribution Agreement 1.0
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16014 6f19259b-4bc3-4df7-8a09-765794883524
When a Unicode string is not stored in a 2-byte aligned memory area,
the StrnCpy() or StrCpy() functions can not be used to copy the string.
The string is now copied using CopyMem().
In the same function, a copy with "AsciiStrnCpy()" has also be replaced
with a copy using "CopyMem()" as the size of the string to copy is in
normal cases known. Another copy using "AsciiStrnCpy()" has been corrected
in order not to run off the array the string is copied into and to ensure
that the copied string has a final zero.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16009 6f19259b-4bc3-4df7-8a09-765794883524
Add additional structure to get file meta-data information from BootMonFS
based files. AXF files are processed by the Flash loader and the ELF header
stripped. The relevant information is stored in the file-system.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15906 6f19259b-4bc3-4df7-8a09-765794883524
Add additional structure to get file meta-data information from BootMonFS
based files. AXF files are processed by the Flash loader and the ELF header
stripped. The relevant information is stored in the file-system.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15902 6f19259b-4bc3-4df7-8a09-765794883524
Replace tabs by spaces for indentation to comply to EDK2 coding standards.
Done in files with extension ".S", ".c", ".h", ".asm", ".dsc", ".inc", "*.inf",
"*.dec" or ".fdf" and located in ArmPkg, ArmPlatformPkg, EmbeddedPkg,
BeagleBoardPkg or Omap35xxPkg.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15901 6f19259b-4bc3-4df7-8a09-765794883524
The condition tries to identify if we were starting a EFI
OS Loader or EFI Application.
But LOAD_OPTION_CATEGORY_BOOT was used as a mask to check the
attributes of the boot options while it is not a mask.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15900 6f19259b-4bc3-4df7-8a09-765794883524
We strongly prefer that contribtions be offered using the same license
as the project/module. But, we should document other acceptable
licenses for contributions.
This will allow package owners to more easily know if they can accept
a contribution under a different source license.
NOTE: This does not modify the wording of the "TianoCore Contribution
Agreement 1.0" section
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Mark Doran <mark.doran@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15892 6f19259b-4bc3-4df7-8a09-765794883524
Some trailing spaces were missing from the previous patch.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15849 6f19259b-4bc3-4df7-8a09-765794883524
UefiBootServicesTableLib already defines gImageHandle that has been initialized with
the value of ImageHandle.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15737 6f19259b-4bc3-4df7-8a09-765794883524
- Variable may be used before being set
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15719 6f19259b-4bc3-4df7-8a09-765794883524
Added the reordering of the boot options feature to the boot manager.
The BootMenuSelectBootOption() has been split into
DisplayBootOptions() that only displays the boot options and
SelectBootOptions() that asks to select one.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15718 6f19259b-4bc3-4df7-8a09-765794883524
Corrected the detection of file system and memory map boot option types.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15717 6f19259b-4bc3-4df7-8a09-765794883524
The new functions never return a invalid IP address.
The user would be asked again if the IP address is mal-formed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15714 6f19259b-4bc3-4df7-8a09-765794883524
Removed "RequestBootType" argument of the "*CreateDevicePathNode()" and
"*UpdateDevicePathNode()" functions. A boolean field "Request
BootType" has been added to the BDS_LOAD_OPTION_SUPPORT structure and
is used by the "BootMenuAddBootOption()" and "BootMenuUpdateBootOption()"
functions instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15713 6f19259b-4bc3-4df7-8a09-765794883524
The platform independant GET_CORE_POS has been replaced by the platform
dependent function ArmPlatformGetCorePosition().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15661 6f19259b-4bc3-4df7-8a09-765794883524
Reworked GetHIInputIP() function to use "NetLibStrToIp4()" library
function to parse the IPv4 address instead of doing it by itself.
Added function EditHIInputIP() in BdsHelper.c to edit an IPv4 address.
To be used when updating a tftp boot option.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15660 6f19259b-4bc3-4df7-8a09-765794883524
The AArch64 Vector Table must be aligned on a 2K boundary.
The FDF specification does not support 2K alignment but support 4K.
A clear comment has been added to help integrator to understand why the
assertion fails when porting to a new AArch64 platform.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15659 6f19259b-4bc3-4df7-8a09-765794883524
Some platforms might decide to not support PSCI in their FDT-aware Linux
system even if their firmware supports it.
It is the responsibility of the platform engineer to provide the appropriate FDT.
The PCD gArmTokenSpaceGuid.PcdArmPsciSupport is not required anymore.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15658 6f19259b-4bc3-4df7-8a09-765794883524
The InterruptId has a different width for GicV2 and GicV3 (respectively
10bit and 24bit).
The function prototype has been changed to return this value to make the
caller GIC architecture version independent. Otherwise, we would have need
to expose a different mask to allow the caller to retrieve this value from
the read register.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15628 6f19259b-4bc3-4df7-8a09-765794883524
Prior to this change if Metronome timer was already initialized the initialization of the
Performance timer was skipped.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15577 6f19259b-4bc3-4df7-8a09-765794883524
The timer frequency for the FVP Architectural Timers have been aligned to 100Mhz.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15555 6f19259b-4bc3-4df7-8a09-765794883524
FVB (for instance for UEFI Variable) might not be at the
start of the NOR Flash. 'Lba' needs to be fixed up for it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15532 6f19259b-4bc3-4df7-8a09-765794883524
This fixes a bug whereby the image description is written over file data when
the file's size is close to a multiple of the block size.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15517 6f19259b-4bc3-4df7-8a09-765794883524
This prevents writing to a garbage location if the file has not been flushed
before, as its BlockStart and BlockEnd are not set.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15514 6f19259b-4bc3-4df7-8a09-765794883524
Now that NorFlashDxe implements DiskIo directly and at a fine granularity
this significantly improves performance.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15512 6f19259b-4bc3-4df7-8a09-765794883524
Trusted Firmware will declare this region of DRAM as secure.
There is no way for the non-secure world to access this memory region.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15511 6f19259b-4bc3-4df7-8a09-765794883524
AARCH64 does not have a BIC-with-immediate instruction. GAS assembles it as a
AND with the immediate inverted, but Clang's integrated assembler emits an
error.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15509 6f19259b-4bc3-4df7-8a09-765794883524
This ensures the .type directive is used to mark them as function symbols
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15506 6f19259b-4bc3-4df7-8a09-765794883524
Some non-GCC toolchain might support the GNU assembly language.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15504 6f19259b-4bc3-4df7-8a09-765794883524
This improves performance by accessing NOR with the fine granularity that
the hardware permits, rather than the coarse granularity assumed by DiskIoDxe.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15502 6f19259b-4bc3-4df7-8a09-765794883524
- Only read what needs reading, don't read the whole block.
- Don't write back buffers containing no data after an erase.
- Reduce number of NOR erases when writing data. Only erase the block
when required.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15500 6f19259b-4bc3-4df7-8a09-765794883524
This is the on board Versatile Express Ethernet controller.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15486 6f19259b-4bc3-4df7-8a09-765794883524
This information give a hint to reserve some contiguous pages for runtime
regions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15466 6f19259b-4bc3-4df7-8a09-765794883524
The FVP Foundation model has additional DRAM regions at 0x08_8000_0000.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15464 6f19259b-4bc3-4df7-8a09-765794883524
The FVP Base and Foundation models have additional DRAM regions at
0x08_8000_0000.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15461 6f19259b-4bc3-4df7-8a09-765794883524
This code is only specific to the ARM Versatile Express hardware board.
There is no concept of logic tile on the FVP model.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15460 6f19259b-4bc3-4df7-8a09-765794883524
EFI OS Loader application will be responsible to start their needed drivers.
While other EFI applications (eg: EFI Shell) expect to have all their drivers
started when they run.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15458 6f19259b-4bc3-4df7-8a09-765794883524
Some limitations:
- it only supports unicode string that use ASCII character (< 0x100)
- single character ASCII strings are interpreted as Unicode string
- string cannot be longer than 2 x BOOT_DEVICE_OPTION_MAX (600 bytes)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15455 6f19259b-4bc3-4df7-8a09-765794883524
OptionalData for EFI Application does not contain any more specific information about the ArmPlatformPkg/Bds.
OptionalData now only contains the data pass to the EFI application.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15451 6f19259b-4bc3-4df7-8a09-765794883524
Most UEFI applications expect unicode string parameter.
This change is allows to support Ascii or Unicode strings.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15450 6f19259b-4bc3-4df7-8a09-765794883524
- Added the NOR Flash region to the Runtime UEFI Memory Mapped IO
- Caught the gEfiEventVirtualAddressChangeGuid event to fixup the NOR Flash pointers
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15438 6f19259b-4bc3-4df7-8a09-765794883524
- No allocation during Runtime mode (post ExitBootServices())
- Allocate all the persistent data into runtime space
- Do not access BootServices API during Runtime mode
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15437 6f19259b-4bc3-4df7-8a09-765794883524
- Removed PCD base address from the macro definition. The base address needs to be fixup when the driver runs in UEFI Runtime mode
- Added the PL031 controller memory region to the Runtime UEFI Memory Mapped IO
- Caught the gEfiEventVirtualAddressChangeGuid event to fixup the PL031 Base address
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15435 6f19259b-4bc3-4df7-8a09-765794883524
The stack size in the entrypoint (ie: $ARCH/ModuleEntryPoint.S) is calculated such as
StackSize = PrimaryCoreStack + (core_count - 1) * SecondaryCoreStack
While we were declaring the stacksize into the stack hob as:
StackSize = PrimaryCoreStack + (cluster * 8) * SecondaryCoreStack
If the number of cluster (ie: PcdClusterCount) were not defined correctly then
the stack size declaration were not correct.
It could cause stack corruption if the allocator allocates memory in this range.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15431 6f19259b-4bc3-4df7-8a09-765794883524
If EditHIInputStr() is called, say with a MaxCmdLine of 2, the user is
currently allowed to enter 2 characters.
If the second character is a carriage return/line feed, this is
substituted with a NULL and the function returns.
If the second character is a regular character, the loop terminated and
the function returns. However, the buffer has not been NULL terminated.
This patch prevents the user from entering a regular character as the
final character and ensures that the only way out of the input is by
pressing ESC or ENTER (or equivalent).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15325 6f19259b-4bc3-4df7-8a09-765794883524
That includes an implementation of FASTBOOT_PLATFORM_PROTOCOL for
ARM Versatile Express.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15317 6f19259b-4bc3-4df7-8a09-765794883524
This driver should be used when adding code specific to a platform based on
ARM VExpress based board.
ArmFvpDxe driver has been renamed into ArmVExpressDxe driver to support the hardware
based platforms and the model based platforms.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15279 6f19259b-4bc3-4df7-8a09-765794883524
Several assembler macros use a loop at the label "dead" to trap an error.
This is difficult to debug as there is no indication of how one arrived at the loop.
This change replaces dead with distinct loops locally in the macro,
which means the cause of the hang is detectable to the debugger.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15273 6f19259b-4bc3-4df7-8a09-765794883524
An assertion that was comparing the block size with the size of
the storage was failing.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15249 6f19259b-4bc3-4df7-8a09-765794883524
- By setting the 'ARM_FVP_RUN_NORFLASH' flag at compile time UEFI will
be linked to run from NOR FLASH0 on FVPs.
- The RAM load location is currently set to 128MB from base of DRAM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15245 6f19259b-4bc3-4df7-8a09-765794883524
This header contains a function that does not exist.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15238 6f19259b-4bc3-4df7-8a09-765794883524
BootMonFs (file system used on the VExpress NOR Flash) is now supported on
both NOR Flash regions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15209 6f19259b-4bc3-4df7-8a09-765794883524
Linux and its DTB required to be loaded in the first 128MB of the system memory.
Moving UEFI firmware above this limit ensures some XIP runtime code (part of the
UEFI firmware) are not overwritten when loading Linux kernel.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15168 6f19259b-4bc3-4df7-8a09-765794883524
The commit on Fri Dec 6 2013: "ArmPlatformPkg/ArmPlatformStackLib:
Do not directly use PcdArmPrimaryCore" has made the function
ArmPlatformStackSet() overwrites the registers r6 and r7.
These registers are used by PrePi to store the MPIDR and the the base
of the system memory region used by UEFI.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15167 6f19259b-4bc3-4df7-8a09-765794883524
The edk2 tree mandates CRLF line terminators. Earlier patches added some
lines with LF terminators. Clean them up.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15132 6f19259b-4bc3-4df7-8a09-765794883524
This is the filesystem created by the microcontroller on NOR Flash of the ARM Versatile
Express Development Board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15126 6f19259b-4bc3-4df7-8a09-765794883524
This patch adds an EDK2_ARMVE_SUPPORT_QEMU macro that can be defined at build
time to build an image that supports QEMU. The default build is unchanged and
builds the RTSM configuration.
QEMU only models fixed size blocks within a flash device, and the RTSM
configuration stores EFI variables in the smaller boot blocks of the
flash. When built for QEMU the larger blocks are used that QEMU properly
emulates.
Signed-off-by: Roy Franz <roy.franz@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15125 6f19259b-4bc3-4df7-8a09-765794883524
The System Memory region might be out of the 32-bit memory space.
This change has been validated on the FVP AArch64 model using 4GB
of DRAM at 0x8_0000_0000:
- # System Memory (2GB)
- gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
- gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000
+ # System Memory (4GB)
+ gArmTokenSpaceGuid.PcdSystemMemoryBase|0x800000000
+ gArmTokenSpaceGuid.PcdSystemMemorySize|0x100000000
EFI Shell and Linux kernel boot successfully.
Note: This change has not been validated on AArch32. I expect some
early assembly code to not work.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15093 6f19259b-4bc3-4df7-8a09-765794883524
Right now the ARM Platform driver does not do much, but
I expect to move most platform specific code into platform
specific driver in the future.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
v5:
- ensure / document that the VIRTIO_BLK_DEVICE_PATH structure must be
packed
- fix whitespace damage in definition of "mVirtioBlockDevicePath"
- the platform driver is added to all platform DSC and FDF files in the
previous patch; this patch focuses on virtio only
Change-Id: I3505bfc5b31085b8017bd9e6895a155bd7a2eee9
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14981 6f19259b-4bc3-4df7-8a09-765794883524
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
v5:
- For uniformity, add the empty driver to
ArmVExpress-RTSM-AEMv8Ax4-foundation.* too in this patch, not just
ArmVExpress-RTSM-AEMv8Ax4.*. V4 added the empty driver to
ArmVExpress-RTSM-AEMv8Ax4-foundation.* not sooner than the next patch,
fusing it with other (= virtio) functionality. Let's split these changes
cleanly.
Change-Id: I7d635011c8d3ac59097c728b7c7786d8677c80cb
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14980 6f19259b-4bc3-4df7-8a09-765794883524
'inline' keyword is not supported by the C89 (version used by EDK2).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14957 6f19259b-4bc3-4df7-8a09-765794883524
We do not have (Secure) Monitor mode on AArch64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14939 6f19259b-4bc3-4df7-8a09-765794883524
To make the code platform independent we should not use PcdArmPrimaryCore
in libraries other than the platform specific libraries.
Some platforms allow to change the primary core with external registers.
These platforms do not use PcdArmPrimaryCore to identify the primary CPU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14938 6f19259b-4bc3-4df7-8a09-765794883524
- Used correct PCD
- Implement the function for AArch64, BeagleBoard, CTA15A7
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14937 6f19259b-4bc3-4df7-8a09-765794883524
This change introduces default values for the PCDs PcdPrePiCpuMemorySize & PcdPrePiCpuIoSize.
These values are for the architectures ARM, AARCH64, IA32 and X64.
The redefinition of these PCDs (with the same default values) have been removed from the DSC files.
Note: the default value for AARCH64 was 32. It was preventing to allocate buffer above the 32bit
address space.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14914 6f19259b-4bc3-4df7-8a09-765794883524
If the DRAM is remapped at 0x0 then we need to wake up the secondary cores from wfe
(waiting for the memory to be initialized) as the instruction is still in the remapped
flash region at 0x0 to make them jumping into the C-code which lives in the NOR1 at 0x44000000 before
the region 0x0 is remapped as DRAM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14910 6f19259b-4bc3-4df7-8a09-765794883524
If EDK2_ARMVE_STANDALONE is not defined then the value is set to 1.
The developer has to explicit set the macro to zero to build a non standalone build.
It means this macro is always defined.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14906 6f19259b-4bc3-4df7-8a09-765794883524
The FVP Base Model has GICv3 support.
UEFI SEC does limited configuration of GICv3 if present. This is required for Linux to use GICv3.
UEFI itself uses the GICv3 in legacy mode (GICv2).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14824 6f19259b-4bc3-4df7-8a09-765794883524
The aim is to make this driver follows the ARM GIC specifications and
be implementation independent.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14810 6f19259b-4bc3-4df7-8a09-765794883524
This patch prevents a buffer underrun error on the Versatile Express
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14793 6f19259b-4bc3-4df7-8a09-765794883524
The shift by 1 on the left was expected. It eases the access to CSSELR and set/way operations
where the cache level field is at the BIT1 position.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14705 6f19259b-4bc3-4df7-8a09-765794883524
At least for AARCH64 currently, SystemMemoryTop and FdTop can overflow
while adding the 32-bit PCDs together. The resulting value loses the
upper 32-bits. Cast each of the values to EFI_PHYSICAL_ADDRESS size
before doing the addition to prevent erroneous overflow. There is currently
no 32-bit platform in EDKII open source that will overflow and this change
would not fix that problem anyway.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14675 6f19259b-4bc3-4df7-8a09-765794883524
This updated patch contains the patch:
- Fixed calculation of BaseOfCode in GenFw when the first code section is aligned:
Fixes the calculation of the PE/COFF header attribute .BaseOfCode. when the first ..text. section is aligned.
In the current code base, the alignment of the first code section is not taken into account for the calculation of BaseOfCode.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14628 6f19259b-4bc3-4df7-8a09-765794883524
GCC47 generates bigger binaries in Debug build than GCC46.
This large increase is considered as a regression.
It will require some investigation to understand the reason
of this increase in size.
The size of the FV has been increased to allow developers to
build these images with the current BaseTools.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14611 6f19259b-4bc3-4df7-8a09-765794883524
modified the comment which can mislead.
The "ldr r0, [r1]" is overrided with a immediate "mov ro, #3"
instruction. This mov instruction will over write the contents
of the ro register. So replacing 'mov' by 'orr' instruction would
prevent to override the original value.
This patch assumes mov is the right instruction to be retained
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Girish K S <ks.giri@samsung.com>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14606 6f19259b-4bc3-4df7-8a09-765794883524
This value was missing from the switch on 'ResetType'.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14583 6f19259b-4bc3-4df7-8a09-765794883524
This function only does the GIC initialization that is always taken care by Sec.c.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14581 6f19259b-4bc3-4df7-8a09-765794883524
This is already taken care by Sec when PcdTrustzoneSupport = TRUE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14580 6f19259b-4bc3-4df7-8a09-765794883524
This PCD ensures the transition from EL3 to EL2 in ArmPlatformPkg/Sec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14579 6f19259b-4bc3-4df7-8a09-765794883524
- Setting DVI fails on VE models. The FVP models behave the same.
These have updated SYS ID numbers and they need to be added to the
driver.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14564 6f19259b-4bc3-4df7-8a09-765794883524
- Disable data cache on all cores.
- Do not clean caches as there might be junk in them, invalidate only.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14527 6f19259b-4bc3-4df7-8a09-765794883524
This change prevent any interrupt to disturb the PL180 data transfer.
If the data transfer is not fast enough, we get UNDERRUN error.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14526 6f19259b-4bc3-4df7-8a09-765794883524
The idea is to remove the PCD PcdGicPrimaryCoreId to make the port easier (and also to allow changing
the primary boot CPU without adding more platform specific code to UEFI).
There is a risk the mailboxes contain garbage at boot time. But it should be easy enough to clear the
mailboxes when starting UEFI to workaround this limitation.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14477 6f19259b-4bc3-4df7-8a09-765794883524
ARM Versatile Express TC2 Core Tile has two profiles: the 1GB DRAM core tile or
the 2GB DRAM core tile profiles.
By default UEFI assumes, it is the 1GB core tile. In case of 2GB DRAM it declares
this additional 1GB resource system memory to UEFI. But the previous code did
not map this memory in the MMU Page Table.
So, the memory was allocatable by UEFI modules, but was not accessible by the CPU
(because not mapped).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Leif Lindholm <Leif.Lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14449 6f19259b-4bc3-4df7-8a09-765794883524
The syntax '!ifdef $(MACRO)' is deprecated and should be replaced by '!ifdef MACRO'.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14440 6f19259b-4bc3-4df7-8a09-765794883524
This patch changes the Versatile Express A9 BSP to build with
EDK2_ARMVE_STANDALONE=1 as the default option.
The user may then specify zero if they wish to build the non-standalone
version.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14439 6f19259b-4bc3-4df7-8a09-765794883524
LibResetSystem was performing a cold reboot for both reboot and
shutdown.
This patch updates LibResetSystem to pass SYS_CFG_SHUTDOWN to the
microcontroller when called wit EfiResetShutdown.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14438 6f19259b-4bc3-4df7-8a09-765794883524
Currently, only ".efi" files are recognized as valid ARM UEFI
applications by BDS. This patch also makes ".EFI" files recognised.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14437 6f19259b-4bc3-4df7-8a09-765794883524
The aim of the condition is to check if we should use the default BaudRate
value (case when *BaudRate == 0).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14431 6f19259b-4bc3-4df7-8a09-765794883524
That should prevent the risk of buffer overflow.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14430 6f19259b-4bc3-4df7-8a09-765794883524
The size of the FDs did not match the FD layout.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14426 6f19259b-4bc3-4df7-8a09-765794883524
To be compliant with the UEFI specification it is required to update SERIAL_IO_MODE with the values set.
This prototype change allows to get the value used inside SerialPortSetAttributes().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14365 6f19259b-4bc3-4df7-8a09-765794883524
The FDT name are the one from Linaro release.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14348 6f19259b-4bc3-4df7-8a09-765794883524
This function allows platform to do any specific actions prior to
the start the PEI phase.
For instance, this function could be used by some platforms to initialize clocks that
are required at the early stage of the PEI phase.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14347 6f19259b-4bc3-4df7-8a09-765794883524
ArmPlatformGetPrimaryCoreMpId returns the MPID of the primary core.
The primary core might not be known at build time (eg: the platform allows
the boot CPU to be changed through board config).
This function is used during the secondary core stack initialization to know
the position of the secondary core in the SoC.
A secondary core that is at the position N, with N greater than the primary
core position, will be at the position N-1 in the list of secondary stacks
(the primary core has its own separate bigger stack).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14345 6f19259b-4bc3-4df7-8a09-765794883524
Checking if a core if the primary/boot core used to be done with the macro
IS_PRIMARY_CORE().
Some platforms exposes configuration registers to change the primary core.
Replacing the macro IS_PRIMARY_CORE() by ArmPlatformIsPrimaryCore() allows
some flexibility in the way to check the primary core.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14344 6f19259b-4bc3-4df7-8a09-765794883524
ArmPlatformGetAdditionalSystemMemory() function wasn't used anywhere in UEFI.
This patch deletes it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14270 6f19259b-4bc3-4df7-8a09-765794883524
Only the Cortex A9 based platforms have an external L2 controller.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14269 6f19259b-4bc3-4df7-8a09-765794883524
The initial support was only considering the added Device Path will be a single node.
TFTP for instance requires two new nodes on the top of the ethernet Device Path; a first
one for the IP address of the server and a second one for the file to download.
This change replace the return argument from a DevicePath node by a DevicePath.
It means the End Device Path node is now required.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14194 6f19259b-4bc3-4df7-8a09-765794883524
The signature was declared as UINTN.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14190 6f19259b-4bc3-4df7-8a09-765794883524
Needed to convert Word into Byte.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14178 6f19259b-4bc3-4df7-8a09-765794883524
Setting bit4 of SCC register 48 now triggers the erasing of the memory region
reserved for variable storage in NOR flash and the restoration of the default
headers in flash.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14177 6f19259b-4bc3-4df7-8a09-765794883524
Rename GetEnvironmentVariable() function into GetGlobalEnvironmentVariable().
GetEnvironmentVariable() function sill exists but caller must now pass a Guid.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14176 6f19259b-4bc3-4df7-8a09-765794883524
In debug mode, the loader type (EFI application or linux kernel with
FDT/ATAG support) is displayed in UEFI boot menu.
Before this patch it was printed as a decimal number which is
meaningful to the user only if he knows the values of the
ARM_BDS_LOADER_TYPE enumeration type in the source code...
This patch modifies the boot menu so that it also prints a
user-friendly string describing the loader type.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14175 6f19259b-4bc3-4df7-8a09-765794883524
Formerly only the header was defined and it was expecting the SerialPortExtLib
interface to be implemented by SerialPortLib if supported. This behaviour was
not conform to the EDK2 framework.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14173 6f19259b-4bc3-4df7-8a09-765794883524
A ArmSmcLib Null implementation has also been added for CPU without the ARM Security
Extension (Trustzone support).
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14164 6f19259b-4bc3-4df7-8a09-765794883524
PL031_TimeZone and PL031_Daylight are not global variables as defined by UEFI specification
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14107 6f19259b-4bc3-4df7-8a09-765794883524
When deleting a boot entry from the boot menu all next entries must
be copied one entry up to rearrange the BootOrder list.
This patch fixes the copy: each boot entry is 16 bits, not 8 bits.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14090 6f19259b-4bc3-4df7-8a09-765794883524
This is the Makefile for the Windows version of Eclipse (use
MingW for Unix 'emulation').
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13886 6f19259b-4bc3-4df7-8a09-765794883524
These scripts allow to automatically load the symbols using either the
report file created by the BaseTools or using the memory regions
defined in the arguments.
This is the scripts for DS-5 prior to DS5 v5.12.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13874 6f19259b-4bc3-4df7-8a09-765794883524
The new functions are:
- ArmPlatformStackSet(IN UINTN StackBase, IN UINTN MpId, IN UINTN PrimaryStackSize, IN UINTN SecondaryStackSize);
- ArmPlatformStackSetPrimary(IN UINTN StackBase, IN UINTN MpId, IN UINTN PrimaryStackSize, IN UINTN SecondaryStackSize);
- ArmPlatformStackSetSecondary(IN UINTN StackBase, IN UINTN MpId, IN UINTN PrimaryStackSize, IN UINTN SecondaryStackSize);
The stack topology can be changed by implementing a new ArmPlatformStackLib
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13774 6f19259b-4bc3-4df7-8a09-765794883524
EmbeddedPkg/SerialDxe was not allowing to set/get the control of the
Serial connection because the needed functions were not exposed in
SerialPortLib.h.
This commit introduces an additional library to extend the SerialPort
features.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13773 6f19259b-4bc3-4df7-8a09-765794883524
The MP ID Register is not enough to know the position of the core in the SoC.
We could have SoC with multi cluster of CPUs that do not contain the
same number of CPUs.
This function should return the position of the CPU in the SoC.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13770 6f19259b-4bc3-4df7-8a09-765794883524
On ARM PLatforms, there is no standard way to know how many cores are
available on the platform.
This PCD is expected to contain this number.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13769 6f19259b-4bc3-4df7-8a09-765794883524
This library could be used before the UEFI phases to expose the CPU state
when an unexpected exception interrupt the firmware.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13767 6f19259b-4bc3-4df7-8a09-765794883524
In case a DebugAgent library is supported for a specific debugger, we would
expect the exception be caught by DebugAgentLib.
The DebugAgentBaseLib exposes the cause of the exception to the user in the
Serial Terminal.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13766 6f19259b-4bc3-4df7-8a09-765794883524
In case a DebugAgent library is supported for a specific debugger, we would
expect the exception be caught by DebugAgentLib.
The DebugAgentBaseLib exposes the cause of the exception to the user in the
Serial Terminal.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13765 6f19259b-4bc3-4df7-8a09-765794883524
Use the library libdt from the Device Tree Compiler project.
The used version is from Wednesday 22nd August 2012 (commit: 8716901d2215a3)
The Device Tree Compiler project is under dual BSD/GPL license (it means the
license is either BSD or GPL). The BSD license is the license that fits to the
Tianocore contribution requirements.
The use of libfdt into Tianocore has been authorised by David Gibson the
author of libfdt and its current maintainer Jon Loeliger (email thread on 7th
September 2011).
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13760 6f19259b-4bc3-4df7-8a09-765794883524
Ronald Cron
Olivier Martin
Laszlo Ersek
Scott Duplichan
Leif Lindholm
Jordan Justen
Harry Liebel
Michael Casadevall
Ard Biesheuvel
Olivier Martin olivier.martin
Brendan Jackman
Ryan Harkin
Gao, Liming
Reece R. Pollack
Roy Franz
oliviermartin
Garrett Kirkendall
Girish K S
oliviermartin